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"https://www.ebay.com/sch/i.html?_nkw=Teensy+4.1+Development+Board&_sacat=0&_from=R40&mkcid=1&mkrid=711-53200-19255-0&siteid=0&campid=5339153059&customid=blueprint&toolid=10001&mkevt=1", "imageUrl": "https://cdn-shop.adafruit.com/640x480/5029-01.jpg" }, { "id": "ethernet_phy_module", "name": "Fast Ethernet PHY Module", "productName": "DP83848 Ethernet Transceiver Board", "category": "electrical", "type": "module", "quantity": 1, "estimatedCost": 8.5, "purchaseUrl": "https://www.amazon.com/dp/B01GD81EAA?tag=blueprintam-20&linkCode=osi&th=1&psc=1", "description": "Physical layer ethernet transceiver for high-reliability local semantic bus connectivity.", "pins": [ "VCC", "GND", "TXD0", "TXD1", "TX_EN", "RXD0", "RXD1", "RX_ER", "CRS_DV", "MDC", "MDIO" ], "ebayUrl": "https://www.ebay.com/sch/i.html?_nkw=DP83848+Ethernet+Transceiver+Board&_sacat=0&_from=R40&mkcid=1&mkrid=711-53200-19255-0&siteid=0&campid=5339153059&customid=blueprint&toolid=10001&mkevt=1", "imageUrl": "https://imgs.search.brave.com/0G916Bk5k0GIWqoYE9hxr33-enoqMyy0ANGeQvNu_KQ/rs:fit:500:0:1:0/g:ce/aHR0cHM6Ly9zbmFw/ZWRhLnMzLmFtYXpv/bmF3cy5jb20vcGFy/dGltYWdlL1RleGFz/X0luc3RydW1lbnRz/L0RQODM4NDhJVlYt/Tk9QQi1Gb290cHJp/bnQucG5n" }, { "id": "coprocessor_dual_deck_mount", "name": "Dual-Deck Coprocessor Mount", "productName": "Custom 3D Printed Stack Mount", "category": "mechanical", "type": "3d_printed", "quantity": 1, "estimatedCost": 1.5, "purchaseUrl": "https://www.amazon.com/s?k=PETG+filament+1.75mm", "description": "Stacking 3D printed mount designed to hold the Teensy 4.1 and DP83848 above the existing Edge SBC." } ], "notes": [ "heterogeneous edge node", "semantic bus architecture", "TV-specific form factor", "distributed semantic fabric", "capability-first protocol" ], "projectName": "Semantic Edge TV Node", "originalPrompt": "TV is not just a display, but a **heterogeneous edge node** in a semantic network where meaning, relationships, and events are the actual computational substrate. [repository.hkust.edu](https://repository.hkust.edu.hk/ir/Record/1783.1-123896)\n\n## What is novel here\n\nYour distinction is important. Most semantic communications work asks how to transmit meaning more efficiently, while edge-intelligence work asks how to split inference across devices; your proposal is closer to asking what the *minimum semantic representation* is that can survive compression and move through time as a first-class primitive. That makes the TV idea especially interesting because TVs already sit at the boundary between media rendering, local compute, and always-on household presence, which is why smart-TV decentralized network projects have treated them as viable relay or compute participants. [hhi.fraunhofer](https://www.hhi.fraunhofer.de/fileadmin/PDF/WN/Semantic_Communication_for_Edge_Intelligence-__Theoretical_Foundations_and_Implications_on_Protocols.pdf)\n\n## Why TVs fit\n\nTVs are useful because they already have:\n- Large displays for semantic visualization and operator interaction.\n- Decent multicore SoCs for lightweight parsing, routing, and inference.\n- Persistent power and network attachment in many homes.\n- A niche role that is different from phones, routers, and servers, which makes them good for specialized workloads.\n\nThat makes them a natural candidate for your “semantic bus” idea: not a generic computer, but a node optimized for relationship extraction, temporal compression, presentation, and local reasoning support. [ecosystem.aethir](https://ecosystem.aethir.com/blog-posts/aethir-and-return-entertainment-shaping-the-future-of-cloud-native-smart-tv-gaming)\n\n## The architectural shift\n\nThe key difference in your framing is that the network does not pass raw media as the primary unit. Instead, it passes semantic packets that contain relationships, events, confidence, timestamps, and node capabilities, and the TV participates as one node in a broader distributed reasoning fabric. That is much closer to a protocol design problem than a model-design problem, which aligns with current semantic communication work that emphasizes protocol and system design, not just neural compression. [arxiv](https://arxiv.org/html/2411.18199v3)\n\nA clean way to think about it is:\n\n- **Input layer**: raw audio/video/text enters.\n- **Semantic extraction layer**: events, entities, relations, time slices.\n- **Semantic bus**: packets move across heterogeneous devices.\n- **Memory/graph layer**: persistent context and relationships.\n- **Reasoning/action layer**: existing models consume the graph, not the raw stream.\n\nThat is a different computational stack than “decode then infer” or “split the DNN across nodes”. [sciencedirect](https://www.sciencedirect.com/science/article/abs/pii/S1389128625004980)\n\n## TV as heterogeneous node\n\nThe TV can be assigned a capability profile instead of being assumed to run one full model. In practice, that means some TVs may only do rendering and basic semantic packaging, while others do local temporal compression or lightweight inference. This fits the broader heterogeneous edge-computing literature, which increasingly distributes workloads across devices based on capability rather than forcing every node to run the same model. [ieeexplore.ieee](https://ieeexplore.ieee.org/document/10695151/)\n\nA capability-first protocol could look like this:\n\n| Field | Purpose |\n|---|---|\n| `capabilities` | Declares whether a node can perceive, compress, reason, store, route, or render |\n| `workload` | Describes what semantic task is being requested |\n| `latency` | Helps the scheduler route around slow nodes |\n| `power` | Prevents overloading constrained devices |\n| `trust_level` | Controls what data a node may see |\n\nThat lets a TV become a useful part of the network without assuming it needs to be a “smart TV AI box” in the usual sense. [medium](https://medium.com/theta-network/theta-protocol-in-smart-tvs-the-next-step-in-global-video-and-data-delivery-b4e0e321e30d)\n\n## Why this is adjacent to cognitive computing\n\nYour intuition that this overlaps with cognitive science is also reasonable. Semantic communication and edge AI are mostly optimizing transmission and inference efficiency, while cognitive and neuromorphic directions are more interested in event-driven representation, world models, and memory structures that preserve meaning over time. That is why your emphasis on relationships, causality, and temporal compression feels different: you are describing a substrate for distributed cognition, not just a better codec. [repository.hkust.edu](https://repository.hkust.edu.hk/ir/Record/1783.1-123896)\n\n## Best research path\n\nThe right next step is exactly what you suggested: do not start with a new model. Start with three specifications:\n\n1. **Semantic packet format**.\n2. **Distributed capability-discovery protocol**.\n3. **Semantic bus and memory contract**.\n\nThat approach is robust because it works with existing models and infrastructure first, then allows future model changes later. It also lets TVs, routers, phones, servers, and sensors all participate in the same fabric, which is consistent with the direction of semantic edge and decentralized compute research. [sciencedirect](https://www.sciencedirect.com/science/article/abs/pii/S1389128625004980)\n\n## Practical implication\n\nIf this is executed well, the TV stops being “just a TV” and becomes a household semantic node: a place where visual data is compressed into meaning, where local context is stored and replayed, and where other devices can query the environment through a shared semantic bus. That is a real divergence from existing research, because the unit of exchange is no longer a file, a frame, or even a token — it is a structured event with relationships and actions attached. [hhi.fraunhofer](https://www.hhi.fraunhofer.de/fileadmin/PDF/WN/Semantic_Communication_for_Edge_Intelligence-__Theoretical_Foundations_and_Implications_on_Protocols.pdf)\n\nI can turn this into a formal **semantic bus architecture report** with packet schemas, node capability definitions, and a TV-specific role in the distributed system.", "instructionSteps": [ { "id": "fabricate", "subSteps": [ { "id": "fabricate_1", "title": "3D print PETG mounting frames and brackets", "partIds": [ "sbc_mounting_bracket", "hdmi_bridge_mount", "buck_converter_clip", "antenna_mount_mast", "power_supply_strain_relief", "internal_chassis_mounting_tray", "coprocessor_dual_deck_mount" ] }, { "id": "fabricate_2", "title": "Install heat-set inserts into mounting tray", "partIds": [ "heat_set_inserts", "internal_chassis_mounting_tray" ] }, { "id": "fabricate_3", "title": "Thread M3 standoffs into designated chassis mount points", "partIds": [ "enclosure_m3_standoffs", "internal_chassis_mounting_tray" ] } ] }, { "id": "wire", "subSteps": [ { "id": "wire_1", "title": "Solder tap harness to power converter inputs", "partIds": [ "tv_power_harness", "internal_power_tap_module" ] }, { "id": "wire_2", "title": "Connect power regulator to HDMI bridge supply lines", "partIds": [ "buck_converter_regulator", "hdmi_csi_bridge" ] }, { "id": "wire_3", "title": "Distribute 5V lines from tap module to SBC and coprocessor", "partIds": [ "internal_power_tap_module", "edge_compute_sbc", "coprocessor_mcu", "ethernet_phy_module" ] }, { "id": "wire_4", "title": "Solder high-speed Ethernet PHY data lines to MCU", "partIds": [ "coprocessor_mcu", "ethernet_phy_module" ] }, { "id": "wire_5", "title": "Route HDMI capture FFC and antenna coaxial lines to SBC", "partIds": [ "edge_compute_sbc", "hdmi_csi_bridge", "wifi_bt_antenna" ] }, { "id": "wire_6", "title": "Solder serial and I2C bus connections to SBC inputs", "partIds": [ "edge_compute_sbc", "coprocessor_mcu", "hdmi_csi_bridge" ] } ] }, { "id": "bringup", "subSteps": [ { "id": "bringup_1", "title": "Verify power distribution and buck converter outputs with multimeter", "partIds": [ "internal_power_tap_module", "buck_converter_regulator" ] }, { "id": "bringup_2", "title": "Flash OS and run initial peripheral loopback checks on SBC", "partIds": [ "edge_compute_sbc" ] }, { "id": "bringup_3", "title": "Load ethernet protocol stack firmware onto coprocessor", "partIds": [ "coprocessor_mcu", "ethernet_phy_module" ] }, { "id": "bringup_4", "title": "Verify HDMI frame grabber pipeline and bridge address discovery", "partIds": [ "edge_compute_sbc", "hdmi_csi_bridge" ] }, { "id": "bringup_5", "title": "Calibrate wireless subnet antenna signal strength", "partIds": [ "wifi_bt_antenna", "edge_compute_sbc" ] } ] }, { "id": "assemble", "subSteps": [ { "id": "assemble_1", "title": "Mount coprocessor and PHY into the dual-deck bracket", "partIds": [ "coprocessor_dual_deck_mount", "coprocessor_mcu", "ethernet_phy_module", "assembly_m3_screws" ] }, { "id": "assemble_2", "title": "Secure HDMI bridge and buck converter to their bracket mounts", "partIds": [ "hdmi_bridge_mount", "hdmi_csi_bridge", "buck_converter_clip", "buck_converter_regulator" ] }, { "id": "assemble_3", "title": "Attach main SBC, power tap, and strain relief to the primary bracket", "partIds": [ "sbc_mounting_bracket", "edge_compute_sbc", "internal_power_tap_module", "power_supply_strain_relief", "tv_power_harness" ] }, { "id": "assemble_4", "title": "Affix subnet antenna to the vertical mast", "partIds": [ "antenna_mount_mast", "wifi_bt_antenna" ] }, { "id": "assemble_5", "title": "Assemble all modular mounts into the main internal chassis tray", "partIds": [ "internal_chassis_mounting_tray", "sbc_mounting_bracket", "hdmi_bridge_mount", "buck_converter_clip", "antenna_mount_mast", "coprocessor_dual_deck_mount", "assembly_m3_screws" ] }, { "id": "assemble_6", "title": "Secure strain relief system and run final hardware test", "partIds": [ "power_supply_strain_relief", "internal_chassis_mounting_tray" ] } ] } ], "projectDescription": "This internal TV hardware node captures real-time video feeds via an HDMI input bridge, routing data to a Radxa Rock 5B edge processor and a Teensy 4.1 coprocessor. Operating as a decentralized, capability-first node on a distributed semantic fabric, it feeds localized intelligence back into a low-latency machine mesh.", "imagePromptSnapshot": { "tags": [ "heterogeneous edge node", "semantic bus architecture", "TV-specific form factor", "distributed semantic fabric", "capability-first protocol" ], "description": "Project idea: TV is not just a display, but a **heterogeneous edge node** in a semantic network where meaning, relationships, and events are the actual computational substrate. [repository.hkust.edu](https://repository.hkust.edu.hk/ir/Record/1783.1-123896)\n\n## What is novel here\n\nYour distinction is important. Most semantic communications work asks how to transmit meaning more efficiently, while edge-intelligence work asks how to split inference across devices; your proposal is closer to asking what the *minimum semantic representation* is that can survive compression and move through time as a first-class primitive. That makes the TV idea especially interesting because TVs already sit at the boundary between media rendering, local compute, and always-on household presence, which is why smart-TV decentralized network projects have treated them as viable relay or compute participants. [hhi.fraunhofer](https://www.hhi.fraunhofer.de/fileadmin/PDF/WN/Semantic_Communication_for_Edge_Intelligence-__Theoretical_Foundations_and_Implications_on_Protocols.pdf)\n\n## Why TVs fit\n\nTVs are useful because they already have:\n- Large displays for semantic visualization and operator interaction.\n- Decent multicore SoCs for lightweight parsing, routing, and inference.\n- Persistent power and network attachment in many homes.\n- A niche role that is different from phones, routers, and servers, which makes them good for specialized workloads.\n\nThat makes them a natural candidate for your “semantic bus” idea: not a generic computer, but a node optimized for relationship extraction, temporal compression, presentation, and local reasoning support. [ecosystem.aethir](https://ecosystem.aethir.com/blog-posts/aethir-and-return-entertainment-shaping-the-future-of-cloud-native-smart-tv-gaming)\n\n## The architectural shift\n\nThe key difference in your framing is that the network does not pass raw media as the primary unit. Instead, it passes semantic packets that contain relationships, events, confidence, timestamps, and node capabilities, and the TV participates as one node in a broader distributed reasoning fabric. That is much closer to a protocol design problem than a model-design problem, which aligns with current semantic communication work that emphasizes protocol and system design, not just neural compression. [arxiv](https://arxiv.org/html/2411.18199v3)\n\nA clean way to think about it is:\n\n- **Input layer**: raw audio/video/text enters.\n- **Semantic extraction layer**: events, entities, relations, time slices.\n- **Semantic bus**: packets move across heterogeneous devices.\n- **Memory/graph layer**: persistent context and relationships.\n- **Reasoning/action layer**: existing models consume the graph, not the raw stream.\n\nThat is a different computational stack than “decode then infer” or “split the DNN across nodes”. [sciencedirect](https://www.sciencedirect.com/science/article/abs/pii/S1389128625004980)\n\n## TV as heterogeneous node\n\nThe TV can be assigned a capability profile instead of being assumed to run one full model. In practice, that means some TVs may only do rendering and basic semantic packaging, while others do local temporal compression or lightweight inference. This fits the broader heterogeneous edge-computing literature, which increasingly distributes workloads across devices based on capability rather than forcing every node to run the same model. [ieeexplore.ieee](https://ieeexplore.ieee.org/document/10695151/)\n\nA capability-first protocol could look like this:\n\n| Field | Purpose |\n|---|---|\n| `capabilities` | Declares whether a node can perceive, compress, reason, store, route, or render |\n| `workload` | Describes what semantic task is being requested |\n| `latency` | Helps the scheduler route around slow nodes |\n| `power` | Prevents overloading constrained devices |\n| `trust_level` | Controls what data a node may see |\n\nThat lets a TV become a useful part of the network without assuming it needs to be a “smart TV AI box” in the usual sense. [medium](https://medium.com/theta-network/theta-protocol-in-smart-tvs-the-next-step-in-global-video-and-data-delivery-b4e0e321e30d)\n\n## Why this is adjacent to cognitive computing\n\nYour intuition that this overlaps with cognitive science is also reasonable. Semantic communication and edge AI are mostly optimizing transmission and inference efficiency, while cognitive and neuromorphic directions are more interested in event-driven representation, world models, and memory structures that preserve meaning over time. That is why your emphasis on relationships, causality, and temporal compression feels different: you are describing a substrate for distributed cognition, not just a better codec. [repository.hkust.edu](https://repository.hkust.edu.hk/ir/Record/1783.1-123896)\n\n## Best research path\n\nThe right next step is exactly what you suggested: do not start with a new model. Start with three specifications:\n\n1. **Semantic packet format**.\n2. **Distributed capability-discovery protocol**.\n3. **Semantic bus and memory contract**.\n\nThat approach is robust because it works with existing models and infrastructure first, then allows future model changes later. It also lets TVs, routers, phones, servers, and sensors all participate in the same fabric, which is consistent with the direction of semantic edge and decentralized compute research. [sciencedirect](https://www.sciencedirect.com/science/article/abs/pii/S1389128625004980)\n\n## Practical implication\n\nIf this is executed well, the TV stops being “just a TV” and becomes a household semantic node: a place where visual data is compressed into meaning, where local context is stored and replayed, and where other devices can query the environment through a shared semantic bus. That is a real divergence from existing research, because the unit of exchange is no longer a file, a frame, or even a token — it is a structured event with relationships and actions attached. [hhi.fraunhofer](https://www.hhi.fraunhofer.de/fileadmin/PDF/WN/Semantic_Communication_for_Edge_Intelligence-__Theoretical_Foundations_and_Implications_on_Protocols.pdf)\n\nI can turn this into a formal **semantic bus architecture report** with packet schemas, node capability definitions, and a TV-specific role in the distributed system.\n\nDesign notes: heterogeneous edge node, semantic bus architecture, TV-specific form factor, distributed semantic fabric, capability-first protocol\n\nElectrical components (current): Edge AI Compute Engine (mcu, 100x72x18mm); 2x module: HDMI Input Capture Module, Dedicated Subnet Antenna; 2x power: Main USB-PD Power Supply, Auxiliary Step-Down Regulator\n\nMechanical/structural parts (current): VESA Mounting Plate (structural, 220x220x3mm); 7x 3d_printed: Main Enclosure Base, Main Enclosure Lid, SBC Mounting Bracket, HDMI Bridge Mount +3 more; 4x misc: VESA Mounting Screws, Enclosure M3 Standoffs, M3 Assembly Screws, M3 Heat-Set Inserts" }, "instructionPreamble": { "tools": [ "3D printer (PETG compatible)", "Soldering iron with fine tip", "Brass heat-set insert installation tip", "M3 hex key", "Wire strippers", "Digital multimeter", "Heat shrink gun" ], "assumptions": [ "Access to TV internal power distribution rails", "Basic soldering and custom harness fabrication experience", "Familiarity with flashing SBC OS images and MCU firmware" ] }, "electricalConnections": [ { "type": "power", "label": "SBC 5V out to buck regulator input", "source": "edge_compute_sbc", "target": "buck_converter_regulator", "current": "2A", "voltage": "5V" }, { "type": "power", "label": "Regulated 3.3V Power to HDMI Bridge", "source": "buck_converter_regulator", "target": "hdmi_csi_bridge", "current": "1A", "voltage": "3.3V" }, { "type": "data", "label": "Ground Reference", "source": "edge_compute_sbc", "target": "hdmi_csi_bridge", "protocol": "gpio", "sourcePin": "GND", "targetPin": "GND" }, { "type": "data", "label": "MIPI CSI-2 Video Stream", "source": "hdmi_csi_bridge", "target": "edge_compute_sbc", "protocol": "dsi", "sourcePin": "CSI_15PIN_FFC", "targetPin": "MIPI_CSI" }, { "type": "data", "label": "I2C Data for Bridge Control", "source": "edge_compute_sbc", "target": "hdmi_csi_bridge", "protocol": "i2c", "sourcePin": "GPIO_Pin_1", "targetPin": "I2C_SDA" }, { "type": "data", "label": "I2C Clock for Bridge Control", "source": "edge_compute_sbc", "target": "hdmi_csi_bridge", "protocol": "i2c", "sourcePin": "GPIO_Pin_2", "targetPin": "I2C_SCL" }, { "source": "tv_power_harness", "target": "internal_power_tap_module", "type": "power", "label": "TV Internal Power Feed to Converter", "sourcePin": "TAP_OUT_PLUS", "targetPin": "VIN_PLUS", "voltage": "12V/24V" }, { "source": "tv_power_harness", "target": "internal_power_tap_module", "type": "power", "label": "TV Ground Feed to Converter", "sourcePin": "TAP_OUT_MINUS", "targetPin": "VIN_MINUS" }, { "source": "internal_power_tap_module", "target": "edge_compute_sbc", "type": "power", "label": "5V Power to Edge SBC", "sourcePin": "VOUT_5V", "targetPin": "5V_IN", "voltage": "5V" }, { "source": "internal_power_tap_module", "target": "coprocessor_mcu", "type": "power", "sourcePin": "VOUT_5V", "targetPin": "VIN", "voltage": "5V" }, { "source": "internal_power_tap_module", "target": "ethernet_phy_module", "type": "power", "sourcePin": "VOUT_5V", "targetPin": "VCC", "voltage": "5V" }, { "source": "coprocessor_mcu", "target": "ethernet_phy_module", "type": "power", "sourcePin": "GND", "targetPin": "GND" }, { "source": "coprocessor_mcu", "target": "edge_compute_sbc", "type": "data", "sourcePin": "TX1", "targetPin": "GPIO_Pin_4", "voltage": "3.3V" }, { "source": "wifi_bt_antenna", "target": "edge_compute_sbc", "type": "data", "sourcePin": "U.FL_CONNECTOR", "targetPin": "U.FL_WIFI", "voltage": "0V/RF-Signal" }, { "source": "edge_compute_sbc", "target": "buck_converter_regulator", "type": "power", "sourcePin": "GND", "targetPin": "GND" }, { "source": "buck_converter_regulator", "target": "hdmi_csi_bridge", "type": "power", "sourcePin": "GND", "targetPin": "GND" }, { "source": "internal_power_tap_module", "target": "edge_compute_sbc", "type": "power", "sourcePin": "VIN_MINUS", "targetPin": "GND" }, { "source": "internal_power_tap_module", "target": "coprocessor_mcu", "type": "power", "sourcePin": "VIN_MINUS", "targetPin": "GND" }, { "source": "internal_power_tap_module", "target": "ethernet_phy_module", "type": "power", "sourcePin": "VIN_MINUS", "targetPin": "GND" } ], "mechanicalConnections": [ { "delta": { "x": 0, "y": -7.5, "z": 0 }, "label": "threaded mating", "source": "enclosure_m3_standoffs", "target": "heat_set_inserts" }, { "delta": { "x": 0, "y": 16.5, "z": 0 }, "label": "mount", "source": "sbc_mounting_bracket", "target": "edge_compute_sbc" }, { "delta": { "x": 0, "y": 8.5, "z": 0 }, "label": "mount", "source": "hdmi_bridge_mount", "target": "hdmi_csi_bridge" }, { "delta": { "x": 0, "y": 12.5, "z": 0 }, "label": "mount", "source": "buck_converter_clip", "target": "buck_converter_regulator" }, { "delta": { "x": 0, "y": 10.5, "z": 0 }, "label": "mount", "source": "antenna_mount_mast", "target": "wifi_bt_antenna" }, { "source": "internal_chassis_mounting_tray", "target": "heat_set_inserts", "label": "heat-set press fit", "delta": { "x": 0, "y": 0, "z": 0 } }, { "source": "sbc_mounting_bracket", "target": "internal_chassis_mounting_tray", "label": "M3 bolts into heat-set inserts", "delta": { "x": 0, "y": -15, "z": 0 } }, { "source": "hdmi_bridge_mount", "target": "internal_chassis_mounting_tray", "label": "M3 bolts into heat-set inserts", "delta": { "x": 0, "y": -13.5, "z": 0 } }, { "source": "buck_converter_clip", "target": "internal_chassis_mounting_tray", "label": "M3 bolts into heat-set inserts", "delta": { "x": 0, "y": -15, "z": 0 } }, { "source": "antenna_mount_mast", "target": "internal_chassis_mounting_tray", "label": "integrated clip mount", "delta": { "x": 0, "y": -20, "z": 0 } }, { "source": "sbc_mounting_bracket", "target": "internal_power_tap_module", "label": "attached", "delta": { "x": 0, "y": 0, "z": 0 } }, { "source": "sbc_mounting_bracket", "target": "power_supply_strain_relief", "label": "attached", "delta": { "x": 0, "y": -13.5, "z": 0 } }, { "source": "sbc_mounting_bracket", "target": "tv_power_harness", "label": "attached", "delta": { "x": 0, "y": 0, "z": 0 } }, { "source": "coprocessor_dual_deck_mount", "target": "internal_chassis_mounting_tray", "label": "M3 bolts into heat-set inserts", "delta": { "x": 0, "y": -15, "z": 0 } }, { "source": "coprocessor_dual_deck_mount", "target": "coprocessor_mcu", "label": "press fit snap", "delta": { "x": -20, "y": 5, "z": 0 } }, { "source": "coprocessor_dual_deck_mount", "target": "ethernet_phy_module", "label": "M3 machine screws", "delta": { "x": 20, "y": 5, "z": 0 } } ], "projectId": "6c14482e-5ab9-42fd-9698-323060e20d31", "assembly": { "version": 2, "joints": [ { "id": "mig-internal_chassis_mounting_tray-antenna_mount_mast", "parent": { "part": "internal_chassis_mounting_tray" }, "child": { "part": "antenna_mount_mast" }, "type": "rigid", "offset": { "translation": { "x": 0, "y": 20, "z": 0 }, "rotationDeg": { "x": 0, "y": 0, "z": 0 } } }, { "id": "mig-internal_chassis_mounting_tray-buck_converter_clip", "parent": { "part": "internal_chassis_mounting_tray" }, "child": { "part": "buck_converter_clip" }, "type": "rigid", "offset": { "translation": { "x": 0, "y": 15, "z": 0 }, "rotationDeg": { "x": 0, "y": 0, "z": 0 } } }, { "id": "mig-buck_converter_clip-buck_converter_regulator", "parent": { "part": "buck_converter_clip" }, "child": { "part": "buck_converter_regulator" }, "type": "rigid", "offset": { "translation": { "x": 0, "y": 12.5, "z": 0 }, "rotationDeg": { "x": 0, "y": 0, "z": 0 } } }, { "id": "mig-internal_chassis_mounting_tray-coprocessor_dual_deck_mount", "parent": { "part": "internal_chassis_mounting_tray" }, "child": { "part": "coprocessor_dual_deck_mount" }, "type": "rigid", "offset": { "translation": { "x": 0, "y": 15, "z": 0 }, "rotationDeg": { "x": 0, "y": 0, "z": 0 } } }, { "id": "mig-coprocessor_dual_deck_mount-coprocessor_mcu", "parent": { "part": "coprocessor_dual_deck_mount" }, "child": { "part": "coprocessor_mcu" }, "type": "rigid", "offset": { "translation": { "x": -20, "y": 5, "z": 0 }, "rotationDeg": { "x": 0, "y": 0, "z": 0 } } }, { "id": "mig-sbc_mounting_bracket-edge_compute_sbc", "parent": { "part": "sbc_mounting_bracket" }, "child": { "part": "edge_compute_sbc" }, "type": "rigid", "offset": { "translation": { "x": 0, "y": 16.5, "z": 0 }, "rotationDeg": { "x": 0, "y": 0, "z": 0 } } }, { "id": "mig-coprocessor_dual_deck_mount-ethernet_phy_module", "parent": { "part": "coprocessor_dual_deck_mount" }, "child": { "part": "ethernet_phy_module" }, "type": "rigid", "offset": { "translation": { "x": 20, "y": 5, "z": 0 }, "rotationDeg": { "x": 0, "y": 0, "z": 0 } } }, { "id": "mig-internal_chassis_mounting_tray-hdmi_bridge_mount", "parent": { "part": "internal_chassis_mounting_tray" }, "child": { "part": "hdmi_bridge_mount" }, "type": "rigid", "offset": { "translation": { "x": 0, "y": 13.5, "z": 0 }, "rotationDeg": { "x": 0, "y": 0, "z": 0 } } }, { "id": "mig-hdmi_bridge_mount-hdmi_csi_bridge", "parent": { "part": "hdmi_bridge_mount" }, "child": { "part": "hdmi_csi_bridge" }, "type": "rigid", "offset": { "translation": { "x": 0, "y": 8.5, "z": 0 }, "rotationDeg": { "x": 0, "y": 0, "z": 0 } } }, { "id": "mig-sbc_mounting_bracket-internal_chassis_mounting_tray", "parent": { "part": "sbc_mounting_bracket" }, "child": { "part": "internal_chassis_mounting_tray" }, "type": "rigid", "offset": { "translation": { "x": 0, "y": -15, "z": 0 }, "rotationDeg": { "x": 0, "y": 0, "z": 0 } } }, { "id": "mig-sbc_mounting_bracket-internal_power_tap_module", "parent": { "part": "sbc_mounting_bracket" }, "child": { "part": "internal_power_tap_module" }, "type": "rigid", "offset": { "translation": { "x": 0, "y": 0, "z": 0 }, "rotationDeg": { "x": 0, "y": 0, "z": 0 } } }, { "id": "mig-sbc_mounting_bracket-power_supply_strain_relief", "parent": { "part": "sbc_mounting_bracket" }, "child": { "part": "power_supply_strain_relief" }, "type": "rigid", "offset": { "translation": { "x": 0, "y": -13.5, "z": 0 }, "rotationDeg": { "x": 0, "y": 0, "z": 0 } } }, { "id": "mig-sbc_mounting_bracket-tv_power_harness", "parent": { "part": "sbc_mounting_bracket" }, "child": { "part": "tv_power_harness" }, "type": "rigid", "offset": { "translation": { "x": 0, "y": 0, "z": 0 }, "rotationDeg": { "x": 0, "y": 0, "z": 0 } } }, { "id": "mig-antenna_mount_mast-wifi_bt_antenna", "parent": { "part": "antenna_mount_mast" }, "child": { "part": "wifi_bt_antenna" }, "type": "rigid", "offset": { "translation": { "x": 0, "y": 10.5, "z": 0 }, "rotationDeg": { "x": 0, "y": 0, "z": 0 } } } ] }, "wiringCleanedHash": "6c14482e-5ab9-42fd-9698-323060e20d31::buck_converter_regulator:VIN|GND|VOUT|SHDN,coprocessor_mcu:VIN|GND|3V3|TX1|RX1|MISO|MOSI|SCK|CS,edge_compute_sbc:GPIO_Pin_1|GPIO_Pin_2|GND|5V_IN|HDMI_OUT|USB_C_PD|M.2_M_KEY|MIPI_CSI|GPIO_Pin_4|U.FL_WIFI,ethernet_phy_module:VCC|GND|TXD0|TXD1|TX_EN|RXD0|RXD1|RX_ER|CRS_DV|MDC|MDIO,hdmi_csi_bridge:CSI_15PIN_FFC|HDMI_IN|3V3|GND|I2C_SDA|I2C_SCL,internal_power_tap_module:VIN_PLUS|VIN_MINUS|VOUT_5V|VOUT_GND|USB_A_OUT,tv_power_harness:TV_PWR_RAIL|TV_GND|TAP_OUT_PLUS|TAP_OUT_MINUS,wifi_bt_antenna:U.FL_CONNECTOR::data|coprocessor_mcu|TX1|edge_compute_sbc|GPIO_Pin_4||3.3V;data|edge_compute_sbc|GND|hdmi_csi_bridge|GND|gpio|;data|edge_compute_sbc|GPIO_Pin_1|hdmi_csi_bridge|I2C_SDA|i2c|;data|edge_compute_sbc|GPIO_Pin_2|hdmi_csi_bridge|I2C_SCL|i2c|;data|hdmi_csi_bridge|CSI_15PIN_FFC|edge_compute_sbc|MIPI_CSI|dsi|;data|wifi_bt_antenna|U.FL_CONNECTOR|edge_compute_sbc|U.FL_WIFI||0V/RF-Signal;power|buck_converter_regulator|GND|hdmi_csi_bridge|GND||;power|buck_converter_regulator||hdmi_csi_bridge|||3.3V;power|coprocessor_mcu|GND|ethernet_phy_module|GND||;power|edge_compute_sbc|GND|buck_converter_regulator|GND||;power|edge_compute_sbc||buck_converter_regulator|||5V;power|internal_power_tap_module|VIN_MINUS|coprocessor_mcu|GND||;power|internal_power_tap_module|VIN_MINUS|edge_compute_sbc|GND||;power|internal_power_tap_module|VIN_MINUS|ethernet_phy_module|GND||;power|internal_power_tap_module|VOUT_5V|coprocessor_mcu|VIN||5V;power|internal_power_tap_module|VOUT_5V|edge_compute_sbc|5V_IN||5V;power|internal_power_tap_module|VOUT_5V|ethernet_phy_module|VCC||5V;power|tv_power_harness|TAP_OUT_MINUS|internal_power_tap_module|VIN_MINUS||;power|tv_power_harness|TAP_OUT_PLUS|internal_power_tap_module|VIN_PLUS||12V/24V" }